component
7812
Public Made by Adomby adom
HXY MOSFET Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2L. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
7812: factory component page (tier=lcsc)
3 files changed
+17−14
7812.lbr+9−3@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>HXY MOSFET Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2L</description> <packages> <package name="TO-252-2"> <description>3 pads, 10.6 x 5.8 mm. TO-252/DPAK SMD package</description>@@ -88,6 +88,7 @@ </packages> <symbols> <symbol name="7812">+ <description>HXY MOSFET Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2L</description> <wire x1="-12.7" y1="2.54" x2="12.7" y2="2.54" width="0.254" layer="94"/> <wire x1="12.7" y1="2.54" x2="12.7" y2="-5.08" width="0.254" layer="94"/> <wire x1="12.7" y1="-5.08" x2="-12.7" y2="-5.08" width="0.254" layer="94"/>@@ -101,7 +102,7 @@ </symbols> <devicesets> <deviceset name="7812" prefix="U">- <description></description>+ <description>HXY MOSFET Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2L</description> <gates> <gate name="G$1" symbol="7812" x="0" y="0"/> </gates>@@ -112,7 +113,12 @@ <connect gate="G$1" pin="GND" pad="2"/> <connect gate="G$1" pin="OUT" pad="3"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="7812" constant="no"/>+ <attribute name="MANUFACTURER" value="HXY MOSFET" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
README.md+4−4@@ -8,9 +8,9 @@ | Pin | Name | Type | Function | |---|---|---|---|-| 1 | IN | power_in | Unregulated positive input voltage. Absolute maximum VIN = 35V; typical operating VIN >= VOUT + dropout (~2.0V at 350mA). Bypass to GND with a 0.33uF ceramic capacitor close to the pin. |-| 2 | GND | power_in | Common ground reference for both input and output. Also serves as the thermal path; connect to a ground plane / copper pour to dissipate power (derating from ~2W at 25C). |-| 3 | OUT | power_out | Regulated +12V output. Typical VOUT = 12.00V (11.40V-12.60V over line/load), IOUT exceeds 500mA at TJ=25C, peak ~0.7A. Bypass to GND with a 0.1uF ceramic capacitor close to the pin for stability. |+| 1 | IN | power_in | Unregulated positive supply input. Maximum input voltage 35V; typical operation with VIN = 14.5V to 30V for 12V output. Bypass with 0.33μF ceramic capacitor to GND close to the pin. |+| 2 | GND | power_in | Ground reference for both input and output. In TO-252-2L this pin is also the exposed tab, providing the primary thermal path to the PCB copper pour. |+| 3 | OUT | power_out | Regulated +12V output (11.64V-12.36V typ. at TJ=25°C). Delivers >500mA continuous; peak ~0.7A. Bypass with 0.1μF ceramic capacitor to GND for stability and transient response. | ## Key specifications @@ -23,7 +23,7 @@ ## Ordering variants -- `7812CDT`+- `7812L7805CDT` ## CAD (KiCad official)
page.json+4−7@@ -32,19 +32,19 @@ "number": "1", "name": "IN", "type": "power_in",- "description": "Unregulated positive input voltage. Absolute maximum VIN = 35V; typical operating VIN >= VOUT + dropout (~2.0V at 350mA). Bypass to GND with a 0.33uF ceramic capacitor close to the pin."+ "description": "Unregulated positive supply input. Maximum input voltage 35V; typical operation with VIN = 14.5V to 30V for 12V output. Bypass with 0.33\u03bcF ceramic capacitor to GND close to the pin." }, { "number": "2", "name": "GND", "type": "power_in",- "description": "Common ground reference for both input and output. Also serves as the thermal path; connect to a ground plane / copper pour to dissipate power (derating from ~2W at 25C)."+ "description": "Ground reference for both input and output. In TO-252-2L this pin is also the exposed tab, providing the primary thermal path to the PCB copper pour." }, { "number": "3", "name": "OUT", "type": "power_out",- "description": "Regulated +12V output. Typical VOUT = 12.00V (11.40V-12.60V over line/load), IOUT exceeds 500mA at TJ=25C, peak ~0.7A. Bypass to GND with a 0.1uF ceramic capacitor close to the pin for stability."+ "description": "Regulated +12V output (11.64V-12.36V typ. at TJ=25\u00b0C). Delivers >500mA continuous; peak ~0.7A. Bypass with 0.1\u03bcF ceramic capacitor to GND for stability and transient response." } ], "provenance": {@@ -108,8 +108,5 @@ "docs/7812-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": {- "public": true- }+ ] }