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Initial commit: component/74lvt2244pw

Ray ·abb2136a85 ·1mo ago
2 files changed +96
README.mdadded+62
@@ -0,0 +1,62 @@+# 74LVT2244PW++**Nexperia** · Global Sourcing Parts · TSSOP-20++74LVT2244PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Active-LOW output enable for bank 1 (outputs 1Y0-1Y3). LOW = outputs driven from 1A0-1A3; HIGH = outputs in high-impedance (Z) state. VIH ≥ 2.0 V, VIL ≤ 0.8 V. |+| 2 | 1A0 | input | Bank 1 data input, channel 0. TTL-compatible logic input with bus-hold; drives 1Y0 when 1OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 3 | 2Y3 | tri_state | Bank 2 data output, channel 3. 3-state buffered copy of 2A3 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 2OE is HIGH. |+| 4 | 1A1 | input | Bank 1 data input, channel 1. TTL-compatible logic input with bus-hold; drives 1Y1 when 1OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 5 | 2Y2 | tri_state | Bank 2 data output, channel 2. 3-state buffered copy of 2A2 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 2OE is HIGH. |+| 6 | 1A2 | input | Bank 1 data input, channel 2. TTL-compatible logic input with bus-hold; drives 1Y2 when 1OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 7 | 2Y1 | tri_state | Bank 2 data output, channel 1. 3-state buffered copy of 2A1 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 2OE is HIGH. |+| 8 | 1A3 | input | Bank 1 data input, channel 3. TTL-compatible logic input with bus-hold; drives 1Y3 when 1OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 9 | 2Y0 | tri_state | Bank 2 data output, channel 0. 3-state buffered copy of 2A0 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 2OE is HIGH. |+| 10 | GND | power_in | Ground (0 V) reference for the device. Connect to system ground with a low-inductance path. |+| 11 | 2A0 | input | Bank 2 data input, channel 0. TTL-compatible logic input with bus-hold; drives 2Y0 when 2OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 12 | 1Y3 | tri_state | Bank 1 data output, channel 3. 3-state buffered copy of 1A3 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 1OE is HIGH. |+| 13 | 2A1 | input | Bank 2 data input, channel 1. TTL-compatible logic input with bus-hold; drives 2Y1 when 2OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 14 | 1Y2 | tri_state | Bank 1 data output, channel 2. 3-state buffered copy of 1A2 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 1OE is HIGH. |+| 15 | 2A2 | input | Bank 2 data input, channel 2. TTL-compatible logic input with bus-hold; drives 2Y2 when 2OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 16 | 1Y1 | tri_state | Bank 1 data output, channel 1. 3-state buffered copy of 1A1 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 1OE is HIGH. |+| 17 | 2A3 | input | Bank 2 data input, channel 3. TTL-compatible logic input with bus-hold; drives 2Y3 when 2OE is LOW. Overvoltage-tolerant to 5.5 V. |+| 18 | 1Y0 | tri_state | Bank 1 data output, channel 0. 3-state buffered copy of 1A0 with ~30 Ω integrated series termination. IOH = -12 mA, IOL = +12 mA. High-Z when 1OE is HIGH. |+| 19 | 2OE | input | Active-LOW output enable for bank 2 (outputs 2Y0-2Y3). LOW = outputs driven from 2A0-2A3; HIGH = outputs in high-impedance (Z) state. VIH ≥ 2.0 V, VIL ≤ 0.8 V. |+| 20 | VCC | power_in | Supply voltage input. Operating range 2.7 V to 3.6 V (absolute max +4.6 V). Decouple locally with a 100 nF ceramic capacitor to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | TSSOP-20 |+| Category | Global Sourcing Parts |+| Pins | 20 |++## Ordering variants++Same part, different packaging or reel option.++- `74LVT2244PW`+- `74LVT2244PWD`++## CAD (KiCad official)++- Symbol: `74LVT2244PW`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586171371047436288) (13 pp, sha256 `f3ba84a19dfdef6e`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74lvt2244pw-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "74lvt2244pw",+  "version": "0.1.0",+  "type": "component",+  "description": "Nexperia Global Sourcing Parts, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "global sourcing parts",+    "74lvt2244pw"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "74lvt2244pw.kicad_sym",+    "74lvt2244pw.kicad_mod",+    "74lvt2244pw.glb",+    "74lvt2244pw.step",+    "74lvt2244pw.lbr",+    "docs/hero.png",+    "docs/74lvt2244pw-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file