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Initial commit: component/74lvc2g32dc-q100h

Ray ·08d12a095e ·1mo ago
2 files changed +84
README.mdadded+50
@@ -0,0 +1,50 @@+# 74LVC2G32DC-Q100H++**Nexperia** · Logic Gates · VSSOP-8-0.5mm++74LVC2G32DC-Q100H from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Gate 1 data input A. CMOS/TTL-compatible Schmitt-trigger input, overvoltage tolerant to 5.5 V independent of VCC. Input leakage ±1 uA max. |+| 2 | 1B | input | Gate 1 data input B. CMOS/TTL-compatible Schmitt-trigger input, overvoltage tolerant to 5.5 V independent of VCC. Input leakage ±1 uA max. |+| 3 | 2Y | output | Gate 2 data output (OR of 2A and 2B). Drives ±24 mA at VCC = 3.0 V; remains high-impedance in Power-down mode (VCC = 0 V) with outputs tolerant to 5.5 V. |+| 4 | GND | power_in | Ground reference (0 V). Ground current rated at -100 mA maximum. |+| 5 | 2A | input | Gate 2 data input A. CMOS/TTL-compatible Schmitt-trigger input, overvoltage tolerant to 5.5 V independent of VCC. Input leakage ±1 uA max. |+| 6 | 2B | input | Gate 2 data input B. CMOS/TTL-compatible Schmitt-trigger input, overvoltage tolerant to 5.5 V independent of VCC. Input leakage ±1 uA max. |+| 7 | 1Y | output | Gate 1 data output (OR of 1A and 1B). Drives ±24 mA at VCC = 3.0 V; remains high-impedance in Power-down mode (VCC = 0 V) with outputs tolerant to 5.5 V. |+| 8 | VCC | power_in | Positive supply voltage, 1.65 V to 5.5 V recommended operating range (absolute maximum 6.5 V). Supply current ICC ≤ 4 uA typical when static. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | VSSOP-8-0.5mm |+| Category | Logic |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `74LVC2G32DC-Q100H`+- `74LVC2G32DP-Q100`++## CAD (KiCad official)++- Symbol: `74LVC2G32DC-Q100H`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588915231284473856) (12 pp, sha256 `698655e8cf96a1f4`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74lvc2g32dc-q100h-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "74lvc2g32dc-q100h",+  "version": "0.1.0",+  "type": "component",+  "description": "Nexperia Logic Gates, VSSOP-8-0.5mm. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "74lvc2g32dc-q100h"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "74lvc2g32dc-q100h.kicad_sym",+    "74lvc2g32dc-q100h.kicad_mod",+    "74lvc2g32dc-q100h.glb",+    "74lvc2g32dc-q100h.step",+    "74lvc2g32dc-q100h.lbr",+    "docs/hero.png",+    "docs/74lvc2g32dc-q100h-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file