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74lvc244apw: factory component page (tier=mfr)

Ray ·02f3c765bc ·2mo ago ·parent dc81d29
1 file changed +188−8
page.json+188−8
@@ -1,13 +1,198 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "74lvc244apw",+  "title": "74LVC244APW",+  "brief": "Nexperia Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Nexperia Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "74lvc244apw"   ],+  "component": {+    "mpn": "74LVC244APW",+    "manufacturer": "Nexperia",+    "package": "TSSOP-20",+    "pin_count": 20,+    "category": "Logic",+    "subcategory": "Buffer/Driver/Transceiver",+    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74LVC244APW.pdf",+    "parts": {+      "symbol": "74lvc244apw.kicad_sym",+      "footprint": "74lvc244apw.kicad_mod",+      "model_3d": "74lvc244apw.glb",+      "model_3d_step": "74lvc244apw.step",+      "lbr": "74lvc244apw.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1OE",+        "type": "input",+        "description": "Output enable input for bank 1 (1Y0-1Y3), active LOW. HIGH forces bank 1 outputs into high-impedance OFF state."+      },+      {+        "number": "2",+        "name": "1A0",+        "type": "input",+        "description": "Bank 1 data input 0. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 1Y0 when 1OE is LOW."+      },+      {+        "number": "3",+        "name": "2Y0",+        "type": "tri_state",+        "description": "Bank 2 data output 0. 3-state CMOS output; drives 2A0 input state when 2OE is LOW, high-impedance when 2OE is HIGH."+      },+      {+        "number": "4",+        "name": "1A1",+        "type": "input",+        "description": "Bank 1 data input 1. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 1Y1 when 1OE is LOW."+      },+      {+        "number": "5",+        "name": "2Y1",+        "type": "tri_state",+        "description": "Bank 2 data output 1. 3-state CMOS output driven by 2A1 when 2OE is LOW."+      },+      {+        "number": "6",+        "name": "1A2",+        "type": "input",+        "description": "Bank 1 data input 2. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 1Y2 when 1OE is LOW."+      },+      {+        "number": "7",+        "name": "2Y2",+        "type": "tri_state",+        "description": "Bank 2 data output 2. 3-state CMOS output driven by 2A2 when 2OE is LOW."+      },+      {+        "number": "8",+        "name": "1A3",+        "type": "input",+        "description": "Bank 1 data input 3. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 1Y3 when 1OE is LOW."+      },+      {+        "number": "9",+        "name": "2Y3",+        "type": "tri_state",+        "description": "Bank 2 data output 3. 3-state CMOS output driven by 2A3 when 2OE is LOW."+      },+      {+        "number": "10",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V)."+      },+      {+        "number": "11",+        "name": "2A3",+        "type": "input",+        "description": "Bank 2 data input 3. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 2Y3 when 2OE is LOW."+      },+      {+        "number": "12",+        "name": "1Y3",+        "type": "tri_state",+        "description": "Bank 1 data output 3. 3-state CMOS output driven by 1A3 when 1OE is LOW."+      },+      {+        "number": "13",+        "name": "2A2",+        "type": "input",+        "description": "Bank 2 data input 2. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 2Y2 when 2OE is LOW."+      },+      {+        "number": "14",+        "name": "1Y2",+        "type": "tri_state",+        "description": "Bank 1 data output 2. 3-state CMOS output driven by 1A2 when 1OE is LOW."+      },+      {+        "number": "15",+        "name": "2A1",+        "type": "input",+        "description": "Bank 2 data input 1. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 2Y1 when 2OE is LOW."+      },+      {+        "number": "16",+        "name": "1Y1",+        "type": "tri_state",+        "description": "Bank 1 data output 1. 3-state CMOS output driven by 1A1 when 1OE is LOW."+      },+      {+        "number": "17",+        "name": "2A0",+        "type": "input",+        "description": "Bank 2 data input 0. Schmitt-trigger CMOS input, 5.5 V tolerant; drives buffer output 2Y0 when 2OE is LOW."+      },+      {+        "number": "18",+        "name": "1Y0",+        "type": "tri_state",+        "description": "Bank 1 data output 0. 3-state CMOS output driven by 1A0 when 1OE is LOW."+      },+      {+        "number": "19",+        "name": "2OE",+        "type": "input",+        "description": "Output enable input for bank 2 (2Y0-2Y3), active LOW. HIGH forces bank 2 outputs into high-impedance OFF state."+      },+      {+        "number": "20",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage. Recommended operating range 1.65 V to 3.6 V (functional down to 1.2 V); absolute max 6.5 V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://assets.nexperia.com/documents/data-sheet/74LVC244APW.pdf",+        "pages": 16,+        "sha256": "4195257c91082e34",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Nexperia",+      "Package": "TSSOP-20",+      "Category": "Logic",+      "Pins": "20"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "74lvc244apw"+  ],+  "discovery_pitch": "74LVC244APW (Nexperia) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +210,5 @@     "docs/74lvc244apw-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file