← Commit history

Set visibility: public

Ray ·8cee3bea85 ·1mo ago ·parent 8d81ba4
1 file changed +7−4
page.json+7−4
@@ -38,7 +38,7 @@         "number": "2",         "name": "A",         "type": "input",-        "description": "Data input to the inverter gate. CMOS/TTL-compatible, 5.5 V tolerant regardless of VCC. VIH \u2265 0.7\u00b7VCC (VCC = 4.5-5.5 V); VIL \u2264 0.3\u00b7VCC. Input current \u00b15 \u00b5A max."+        "description": "Data input to the inverter gate. CMOS/TTL-compatible, 5.5 V tolerant regardless of VCC. VIH ≥ 0.7·VCC (VCC = 4.5-5.5 V); VIL ≤ 0.3·VCC. Input current ±5 µA max."       },       {         "number": "3",@@ -50,13 +50,13 @@         "number": "4",         "name": "Y",         "type": "output",-        "description": "Inverted data output (Y = /A). Push-pull CMOS output; \u00b124 mA drive at VCC = 3 V, up to \u00b132 mA at VCC = 4.5 V. Output is high-impedance during partial power-down (IOFF)."+        "description": "Inverted data output (Y = /A). Push-pull CMOS output; ±24 mA drive at VCC = 3 V, up to ±32 mA at VCC = 4.5 V. Output is high-impedance during partial power-down (IOFF)."       },       {         "number": "5",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply voltage, 1.65 V to 5.5 V operating (1.5 V min for data retention). Decouple locally with a 0.1 \u00b5F ceramic capacitor. Absolute max 6.5 V."+        "description": "Positive supply voltage, 1.65 V to 5.5 V operating (1.5 V min for data retention). Decouple locally with a 0.1 µF ceramic capacitor. Absolute max 6.5 V."       }     ],     "provenance": {@@ -154,5 +154,8 @@     "docs/74lvc1g04w5-7-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file