74lvc125as14-13: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC…
74lvc125as14-13: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
74lvc125as14-13: laser-etched CAD + chip hero (factory 2.0.0 backfill)
74lvc125as14-13: stamp component.logic (74LVC125) from component-ocean
74lvc125as14-13: backfill missing artifacts (etch)
74lvc125as14-13: factory component page (tier=lcsc)
Initial commit: component/74lvc125as14-13