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74hc86d: factory component page (tier=mfr)

Ray ·b2c3f86427 ·2mo ago ·parent bda8112
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "74hc86d",+  "title": "74HC86D",+  "brief": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "74hc86d"   ],+  "component": {+    "mpn": "74HC86D",+    "manufacturer": "Nexperia",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74HC86D.pdf",+    "parts": {+      "symbol": "74hc86d.kicad_sym",+      "footprint": "74hc86d.kicad_mod",+      "model_3d": "74hc86d.glb",+      "model_3d_step": "74hc86d.step",+      "lbr": "74hc86d.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Gate 1 data input A. CMOS-level logic input to the first 2-input XOR gate."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Gate 1 data input B. CMOS-level logic input to the first 2-input XOR gate."+      },+      {+        "number": "3",+        "name": "1Y",+        "type": "output",+        "description": "Gate 1 data output. XOR result of inputs 1A and 1B. Drives up to \u00b15.2 mA at VCC = 6.0 V."+      },+      {+        "number": "4",+        "name": "2A",+        "type": "input",+        "description": "Gate 2 data input A. CMOS-level logic input to the second 2-input XOR gate."+      },+      {+        "number": "5",+        "name": "2B",+        "type": "input",+        "description": "Gate 2 data input B. CMOS-level logic input to the second 2-input XOR gate."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "output",+        "description": "Gate 2 data output. XOR result of inputs 2A and 2B. Drives up to \u00b15.2 mA at VCC = 6.0 V."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Common return for supply and all logic signals."+      },+      {+        "number": "8",+        "name": "3Y",+        "type": "output",+        "description": "Gate 3 data output. XOR result of inputs 3A and 3B. Drives up to \u00b15.2 mA at VCC = 6.0 V."+      },+      {+        "number": "9",+        "name": "3A",+        "type": "input",+        "description": "Gate 3 data input A. CMOS-level logic input to the third 2-input XOR gate."+      },+      {+        "number": "10",+        "name": "3B",+        "type": "input",+        "description": "Gate 3 data input B. CMOS-level logic input to the third 2-input XOR gate."+      },+      {+        "number": "11",+        "name": "4Y",+        "type": "output",+        "description": "Gate 4 data output. XOR result of inputs 4A and 4B. Drives up to \u00b15.2 mA at VCC = 6.0 V."+      },+      {+        "number": "12",+        "name": "4A",+        "type": "input",+        "description": "Gate 4 data input A. CMOS-level logic input to the fourth 2-input XOR gate."+      },+      {+        "number": "13",+        "name": "4B",+        "type": "input",+        "description": "Gate 4 data input B. CMOS-level logic input to the fourth 2-input XOR gate."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage. Operating range 2.0 V to 6.0 V (74HC86) or 4.5 V to 5.5 V (74HCT86). Bypass with a 100 nF ceramic capacitor to GND close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://assets.nexperia.com/documents/data-sheet/74HC86D.pdf",+        "pages": 12,+        "sha256": "efb3cf17b91fff76",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Nexperia",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "74hc86d"+  ],+  "discovery_pitch": "74HC86D (Nexperia) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/74hc86d-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file