component
74HC76S
Public Made by Adomby adom
GR Flip Flops, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "74hc76s",+ "title": "74HC76S",+ "brief": "GR Flip Flops, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "GR Flip Flops, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "74hc76s" ],+ "component": {+ "mpn": "74HC76S",+ "manufacturer": "GR",+ "package": "SOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2403121630_GR-74HC76S_C22357611.pdf",+ "parts": {+ "symbol": "74hc76s.kicad_sym",+ "footprint": "74hc76s.kicad_mod",+ "model_3d": "74hc76s.glb",+ "model_3d_step": "74hc76s.step",+ "lbr": "74hc76s.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1CK",+ "type": "input",+ "description": "Clock input for flip-flop 1 (active on falling edge). Schmitt-compatible CMOS input; VIH >= 0.7*VCC, VIL <= 0.3*VCC (approx)."+ },+ {+ "number": "2",+ "name": "1PR",+ "type": "input",+ "description": "Preset input for flip-flop 1, active LOW. Asynchronously forces 1Q HIGH / 1Q-bar LOW."+ },+ {+ "number": "3",+ "name": "1CLR",+ "type": "input",+ "description": "Clear input for flip-flop 1, active LOW. Asynchronously forces 1Q LOW / 1Q-bar HIGH."+ },+ {+ "number": "4",+ "name": "1J",+ "type": "input",+ "description": "J data input for flip-flop 1. Sampled on the falling edge of 1CK together with 1K to determine next-state behaviour (hold/set/reset/toggle)."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply, 2.0 V to 6.0 V (5 V typical). Absolute maximum -0.5 V to 6.5 V."+ },+ {+ "number": "6",+ "name": "2CK",+ "type": "input",+ "description": "Clock input for flip-flop 2 (active on falling edge)."+ },+ {+ "number": "7",+ "name": "2PR",+ "type": "input",+ "description": "Preset input for flip-flop 2, active LOW. Asynchronously forces 2Q HIGH / 2Q-bar LOW."+ },+ {+ "number": "8",+ "name": "2CLR",+ "type": "input",+ "description": "Clear input for flip-flop 2, active LOW. Asynchronously forces 2Q LOW / 2Q-bar HIGH."+ },+ {+ "number": "9",+ "name": "2J",+ "type": "input",+ "description": "J data input for flip-flop 2. Sampled on the falling edge of 2CK together with 2K."+ },+ {+ "number": "10",+ "name": "2Q_N",+ "type": "output",+ "description": "Inverted Q output for flip-flop 2. Push-pull CMOS output; can drive up to 10 LSTTL loads (approx. 4 mA at VCC=4.5 V)."+ },+ {+ "number": "11",+ "name": "2Q",+ "type": "output",+ "description": "Non-inverted Q output for flip-flop 2. Push-pull CMOS; drives up to 10 LSTTL loads."+ },+ {+ "number": "12",+ "name": "2K",+ "type": "input",+ "description": "K data input for flip-flop 2. Sampled on the falling edge of 2CK together with 2J."+ },+ {+ "number": "13",+ "name": "GND",+ "type": "power_in",+ "description": "Ground (0 V) reference for supply and I/O."+ },+ {+ "number": "14",+ "name": "1Q_N",+ "type": "output",+ "description": "Inverted Q output for flip-flop 1. Push-pull CMOS; drives up to 10 LSTTL loads."+ },+ {+ "number": "15",+ "name": "1Q",+ "type": "output",+ "description": "Non-inverted Q output for flip-flop 1. Push-pull CMOS; drives up to 10 LSTTL loads."+ },+ {+ "number": "16",+ "name": "1K",+ "type": "input",+ "description": "K data input for flip-flop 1. Sampled on the falling edge of 1CK together with 1J."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2403121630_GR-74HC76S_C22357611.pdf",+ "pages": 5,+ "sha256": "b9800ce078bc772d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "GR",+ "Package": "SOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "74hc76s"+ ],+ "discovery_pitch": "74HC76S (GR) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/74hc76s-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }