component
74HC595N
Public Made by Adomby adom
HGSEMI Shifting Register, DIP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+12−9@@ -74,43 +74,43 @@ "number": "8", "name": "GND", "type": "power_in",- "description": "Ground / 0 V reference (\u7535\u6e90\u5730)."+ "description": "Ground / 0 V reference (电源地)." }, { "number": "9", "name": "Q'H", "type": "output",- "description": "Serial data output from the shift register. Used to cascade the serial data to the next 74HC595 (\u4e32\u884c\u6570\u636e\u8f93\u51fa\u7ba1\u811a). Not tri-stated; always driven."+ "description": "Serial data output from the shift register. Used to cascade the serial data to the next 74HC595 (串行数据输出管脚). Not tri-stated; always driven." }, { "number": "10", "name": "SCLR", "type": "input",- "description": "Active-low shift-register clear (asynchronous reset). Drive low to clear the 8-bit shift register (\u79fb\u4f4d\u5bc4\u5b58\u5668\u6e05\u96f6\u7aef); must be high for normal shift operation."+ "description": "Active-low shift-register clear (asynchronous reset). Drive low to clear the 8-bit shift register (移位寄存器清零端); must be high for normal shift operation." }, { "number": "11", "name": "SCK", "type": "input",- "description": "Shift-register clock input (\u6570\u636e\u8f93\u5165\u65f6\u949f\u7aef). On the rising edge, data on SER is shifted into the internal 8-bit shift register."+ "description": "Shift-register clock input (数据输入时钟端). On the rising edge, data on SER is shifted into the internal 8-bit shift register." }, { "number": "12", "name": "RCK", "type": "input",- "description": "Storage-register (latch) clock (\u8f93\u51fa\u5b58\u50a8\u5668\u9501\u5b58\u65f6\u949f\u7aef). Rising edge latches the current shift-register contents into the 8-bit output storage register that drives QA~QH."+ "description": "Storage-register (latch) clock (输出存储器锁存时钟端). Rising edge latches the current shift-register contents into the 8-bit output storage register that drives QA~QH." }, { "number": "13", "name": "G", "type": "input",- "description": "Active-low output enable for the QA~QH tri-state parallel outputs (\u8f93\u51fa\u4f7f\u80fd\u7aef). Low = outputs driven; high = outputs high-impedance. Does not affect Q'H."+ "description": "Active-low output enable for the QA~QH tri-state parallel outputs (输出使能端). Low = outputs driven; high = outputs high-impedance. Does not affect Q'H." }, { "number": "14", "name": "SER", "type": "input",- "description": "Serial data input (\u6570\u636e\u8f93\u5165\u7aef). Sampled on the rising edge of SCK and shifted into the LSB of the internal shift register."+ "description": "Serial data input (数据输入端). Sampled on the rising edge of SCK and shifted into the LSB of the internal shift register." }, { "number": "15",@@ -122,7 +122,7 @@ "number": "16", "name": "VCC", "type": "power_in",- "description": "Positive supply, 3.2 V to 6 V (typical 5 V); absolute max 6.5 V. Icc \u2264 5 \u00b5A (typical, static) at VCC = 6 V."+ "description": "Positive supply, 3.2 V to 6 V (typical 5 V); absolute max 6.5 V. Icc ≤ 5 µA (typical, static) at VCC = 6 V." } ], "provenance": {@@ -186,5 +186,8 @@ "docs/74hc595n-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }