component
74HC595N
Public Made by Adomby adom
HGSEMI Shifting Register, DIP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "74hc595n",+ "title": "74HC595N",+ "brief": "HGSEMI Shifting Register, DIP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "HGSEMI Shifting Register, DIP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "74hc595n" ],+ "component": {+ "mpn": "74HC595N",+ "manufacturer": "HGSEMI",+ "package": "DIP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/a3fbc4f7888fd390190e6295c01a3aa8.pdf",+ "parts": {+ "symbol": "74hc595n.kicad_sym",+ "footprint": "74hc595n.kicad_mod",+ "model_3d": "74hc595n.glb",+ "model_3d_step": "74hc595n.step",+ "lbr": "74hc595n.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "QB",+ "type": "tri_state",+ "description": "Parallel data output bit B (one of QA~QH 8-bit parallel outputs). Tri-state; driven when output-enable G is low, high-Z when G is high."+ },+ {+ "number": "2",+ "name": "QC",+ "type": "tri_state",+ "description": "Parallel data output bit C. Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "3",+ "name": "QD",+ "type": "tri_state",+ "description": "Parallel data output bit D. Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "4",+ "name": "QE",+ "type": "tri_state",+ "description": "Parallel data output bit E. Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "5",+ "name": "QF",+ "type": "tri_state",+ "description": "Parallel data output bit F. Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "6",+ "name": "QG",+ "type": "tri_state",+ "description": "Parallel data output bit G. Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "7",+ "name": "QH",+ "type": "tri_state",+ "description": "Parallel data output bit H (last of the 8 latched parallel outputs). Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground / 0 V reference (\u7535\u6e90\u5730)."+ },+ {+ "number": "9",+ "name": "Q'H",+ "type": "output",+ "description": "Serial data output from the shift register. Used to cascade the serial data to the next 74HC595 (\u4e32\u884c\u6570\u636e\u8f93\u51fa\u7ba1\u811a). Not tri-stated; always driven."+ },+ {+ "number": "10",+ "name": "SCLR",+ "type": "input",+ "description": "Active-low shift-register clear (asynchronous reset). Drive low to clear the 8-bit shift register (\u79fb\u4f4d\u5bc4\u5b58\u5668\u6e05\u96f6\u7aef); must be high for normal shift operation."+ },+ {+ "number": "11",+ "name": "SCK",+ "type": "input",+ "description": "Shift-register clock input (\u6570\u636e\u8f93\u5165\u65f6\u949f\u7aef). On the rising edge, data on SER is shifted into the internal 8-bit shift register."+ },+ {+ "number": "12",+ "name": "RCK",+ "type": "input",+ "description": "Storage-register (latch) clock (\u8f93\u51fa\u5b58\u50a8\u5668\u9501\u5b58\u65f6\u949f\u7aef). Rising edge latches the current shift-register contents into the 8-bit output storage register that drives QA~QH."+ },+ {+ "number": "13",+ "name": "G",+ "type": "input",+ "description": "Active-low output enable for the QA~QH tri-state parallel outputs (\u8f93\u51fa\u4f7f\u80fd\u7aef). Low = outputs driven; high = outputs high-impedance. Does not affect Q'H."+ },+ {+ "number": "14",+ "name": "SER",+ "type": "input",+ "description": "Serial data input (\u6570\u636e\u8f93\u5165\u7aef). Sampled on the rising edge of SCK and shifted into the LSB of the internal shift register."+ },+ {+ "number": "15",+ "name": "QA",+ "type": "tri_state",+ "description": "Parallel data output bit A (first of the QA~QH 8-bit outputs). Tri-state output controlled by G (pin 13)."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply, 3.2 V to 6 V (typical 5 V); absolute max 6.5 V. Icc \u2264 5 \u00b5A (typical, static) at VCC = 6 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/a3fbc4f7888fd390190e6295c01a3aa8.pdf",+ "pages": 13,+ "sha256": "2466d95b2f765594",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "HGSEMI",+ "Package": "DIP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "74hc595n"+ ],+ "discovery_pitch": "74HC595N (HGSEMI) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/74hc595n-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }