component
74HC595A
Public Made by Adomby adom
Shenzhen Fuman Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
2 files changed
+507−1
package.json+2−1@@ -24,6 +24,7 @@ "docs/hero.png", "docs/74hc595a-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ] }
pads.jsonadded+505@@ -0,0 +1,505 @@+{+ "schema": "adom.pads/1",+ "slug": "74hc595a",+ "footprint": "SOIC-16_3.9x9.9mm_P1.27mm",+ "generated_from": {+ "footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",+ "pins": "page.json:component.pins",+ "overrides": null+ },+ "pin1": {+ "pad": "1",+ "at": [+ -2.475,+ -4.445+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"+ },+ "pad_count": 16,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+ {+ "pad": "1",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -4.445+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "1",+ "name": "Q1",+ "type": "output",+ "description": "Parallel data output bit 1 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V for direct LED drive.",+ "is_pin1": true,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "2",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -3.175+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "2",+ "name": "Q2",+ "type": "output",+ "description": "Parallel data output bit 2 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "3",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "3",+ "name": "Q3",+ "type": "output",+ "description": "Parallel data output bit 3 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "4",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "4",+ "name": "Q4",+ "type": "output",+ "description": "Parallel data output bit 4 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "5",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "5",+ "name": "Q5",+ "type": "output",+ "description": "Parallel data output bit 5 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "6",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "6",+ "name": "Q6",+ "type": "output",+ "description": "Parallel data output bit 6 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "7",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 3.175+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "7",+ "name": "Q7",+ "type": "output",+ "description": "Parallel data output bit 7 (MSB) from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "8",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 4.445+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Logic ground reference (0 V). Common return for VDD and all output sink currents.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "9",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 4.445+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "9",+ "name": "Q7'",+ "type": "output",+ "description": "Serial data output (last stage of the 8-bit shift register). Used to cascade multiple 74HC595A devices; drive capability IOH7=-20 to -32 mA, IOL7=20 to 32 mA at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "10",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 3.175+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "10",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Leave floating; the datasheet marks this pin as 悬空脚 (unconnected).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "11",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "11",+ "name": "SCK",+ "type": "input",+ "description": "Shift-register clock input. Data on SER is shifted into the 8-bit shift register on the rising edge of SCK. Maximum fCLOCK ~30 MHz at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "12",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "12",+ "name": "RCK",+ "type": "input",+ "description": "Storage-register (latch) clock input. While RCK is high, the shift-register contents are transferred to the storage register that drives Q0-Q7.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "13",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "13",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Leave floating; the datasheet marks this pin as 悬空脚 (unconnected).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "14",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "14",+ "name": "SER",+ "type": "input",+ "description": "Serial data input to the 8-bit shift register. Data is sampled and shifted on the rising edge of SCK. VIH >= 3.2 V, VIL <= 1.8 V at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "15",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -3.175+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "15",+ "name": "Q0",+ "type": "output",+ "description": "Parallel data output bit 0 (LSB) from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "16",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -4.445+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Logic supply voltage. Operating range 3.0-5.5 V (typical 5.0 V); absolute maximum 7.0 V. Bypass locally to GND with a 0.1 uF ceramic capacitor.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ }+ ]+}