component
74HC573PW
Public Made by Adomby adom
Nexperia Latches, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
2 files changed
+627−1
package.json+2−1@@ -24,6 +24,7 @@ "docs/hero.png", "docs/74hc573pw-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ] }
pads.jsonadded+625@@ -0,0 +1,625 @@+{+ "schema": "adom.pads/1",+ "slug": "74hc573pw",+ "footprint": "TSSOP-20_4.4x6.5mm_P0.65mm",+ "generated_from": {+ "footprint": "TSSOP-20_4.4x6.5mm_P0.65mm@sha256:b7ca3a31dd45c122",+ "pins": "page.json:component.pins",+ "overrides": null+ },+ "pin1": {+ "pad": "1",+ "at": [+ -2.8625,+ -2.925+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "TSSOP-20_4.4x6.5mm_P0.65mm@sha256:b7ca3a31dd45c122"+ },+ "pad_count": 20,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+ {+ "pad": "1",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ -2.925+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "1",+ "name": "OE",+ "type": "input",+ "description": "3-state output enable input, active LOW. When HIGH the Q0..Q7 outputs are forced to the high-impedance OFF-state; latch contents are unaffected. CMOS-level input (TTL-level on 74HCT573PW).",+ "is_pin1": true,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "2",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ -2.275+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "2",+ "name": "D0",+ "type": "input",+ "description": "Data input bit 0. Captured into latch 1 on the HIGH-to-LOW transition of LE. Input includes clamp diodes allowing current-limited interfacing above VCC.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "3",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ -1.625+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "3",+ "name": "D1",+ "type": "input",+ "description": "Data input bit 1. Captured into latch 2 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "4",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ -0.975+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "4",+ "name": "D2",+ "type": "input",+ "description": "Data input bit 2. Captured into latch 3 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "5",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ -0.325+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "5",+ "name": "D3",+ "type": "input",+ "description": "Data input bit 3. Captured into latch 4 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "6",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ 0.325+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "6",+ "name": "D4",+ "type": "input",+ "description": "Data input bit 4. Captured into latch 5 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "7",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ 0.975+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "7",+ "name": "D5",+ "type": "input",+ "description": "Data input bit 5. Captured into latch 6 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "8",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ 1.625+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "8",+ "name": "D6",+ "type": "input",+ "description": "Data input bit 6. Captured into latch 7 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "9",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ 2.275+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "9",+ "name": "D7",+ "type": "input",+ "description": "Data input bit 7. Captured into latch 8 on the HIGH-to-LOW transition of LE.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "10",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.8625,+ 2.925+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference, 0 V.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "11",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ 2.925+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "11",+ "name": "LE",+ "type": "input",+ "description": "Latch enable input, active HIGH. While LE is HIGH the latches are transparent (Qn follows Dn); on the HIGH-to-LOW transition the input data is stored.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "12",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ 2.275+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "12",+ "name": "Q7",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 7. Reflects stored D7 when OE is LOW; high-impedance when OE is HIGH. Drives ±6 mA at VCC=4.5 V.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "13",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ 1.625+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "13",+ "name": "Q6",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 6. Reflects stored D6 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "14",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ 0.975+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "14",+ "name": "Q5",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 5. Reflects stored D5 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "15",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ 0.325+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "15",+ "name": "Q4",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 4. Reflects stored D4 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "16",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ -0.325+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "16",+ "name": "Q3",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 3. Reflects stored D3 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "17",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ -0.975+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "17",+ "name": "Q2",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 2. Reflects stored D2 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "18",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ -1.625+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "18",+ "name": "Q1",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 1. Reflects stored D1 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "19",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ -2.275+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "19",+ "name": "Q0",+ "type": "tri_state",+ "description": "3-state non-inverting latch output bit 0. Reflects stored D0 when OE is LOW; high-impedance when OE is HIGH.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "20",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.8625,+ -2.925+ ],+ "rot": 0.0,+ "size": [+ 1.475,+ 0.4+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage. 2.0 V to 6.0 V for 74HC573; 4.5 V to 5.5 V for 74HCT573. Absolute maximum 7 V.",+ "is_pin1": false,+ "source": {+ "geometry": "TSSOP-20_4.4x6.5mm_P0.65mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ }+ ]+}