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74hc21d: factory component page (tier=mfr)

Ray ·8a5c7f5b8e ·1mo ago ·parent e255bdd
1 file changed +162−8
page.json+162−8
@@ -1,13 +1,172 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "74hc21d",+  "title": "74HC21D",+  "brief": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "74hc21d"   ],+  "component": {+    "mpn": "74HC21D",+    "manufacturer": "Nexperia",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74HC21D.pdf",+    "parts": {+      "symbol": "74hc21d.kicad_sym",+      "footprint": "74hc21d.kicad_mod",+      "model_3d": "74hc21d.glb",+      "model_3d_step": "74hc21d.step",+      "lbr": "74hc21d.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Data input A of AND gate 1. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Data input B of AND gate 1. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "3",+        "name": "N.C.",+        "type": "unconnected",+        "description": "Not connected. Leave floating or tie to a defined potential; no internal bond."+      },+      {+        "number": "4",+        "name": "1C",+        "type": "input",+        "description": "Data input C of AND gate 1. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "5",+        "name": "1D",+        "type": "input",+        "description": "Data input D of AND gate 1. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "6",+        "name": "1Y",+        "type": "output",+        "description": "Data output of AND gate 1 (1Y = 1A \u00b7 1B \u00b7 1C \u00b7 1D). Push-pull CMOS output, \u00b125 mA absolute maximum."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V)."+      },+      {+        "number": "8",+        "name": "2Y",+        "type": "output",+        "description": "Data output of AND gate 2 (2Y = 2A \u00b7 2B \u00b7 2C \u00b7 2D). Push-pull CMOS output, \u00b125 mA absolute maximum."+      },+      {+        "number": "9",+        "name": "2A",+        "type": "input",+        "description": "Data input A of AND gate 2. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "10",+        "name": "2B",+        "type": "input",+        "description": "Data input B of AND gate 2. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "11",+        "name": "N.C.",+        "type": "unconnected",+        "description": "Not connected. Leave floating or tie to a defined potential; no internal bond."+      },+      {+        "number": "12",+        "name": "2C",+        "type": "input",+        "description": "Data input C of AND gate 2. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "13",+        "name": "2D",+        "type": "input",+        "description": "Data input D of AND gate 2. CMOS input level referenced to V_CC; includes input clamp diode."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage, 2.0 V to 6.0 V (5.0 V typ). Absolute max 7 V. Bypass locally to GND with a 100 nF ceramic capacitor."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://assets.nexperia.com/documents/data-sheet/74HC21D.pdf",+        "pages": 11,+        "sha256": "1f36967884668dca",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Nexperia",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "variants": [+    {+      "mpn": "74HC21DD",+      "kind": "packaging"+    },+    {+      "mpn": "74HC21DPW",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "74hc21d"+  ],+  "discovery_pitch": "74HC21D (Nexperia) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +184,5 @@     "docs/74hc21d-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file