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pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)

Ray ·3ee65bc85e · ·parent 45f99d7
2 files changed +447−1
package.json+2−1
@@ -24,6 +24,7 @@     "docs/hero.png",     "docs/74hc164d-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ] }\ No newline at end of file
pads.jsonadded+445
@@ -0,0 +1,445 @@+{+ "schema": "adom.pads/1",+ "slug": "74hc164d",+ "footprint": "SOIC-14_3.9x8.7mm_P1.27mm",+ "generated_from": {+  "footprint": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",+  "pins": "page.json:component.pins",+  "overrides": null+ },+ "pin1": {+  "pad": "1",+  "at": [+   -2.475,+   -3.81+  ],+  "corner": "top-left",+  "source": "silk-marker",+  "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9"+ },+ "pad_count": 14,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+  {+   "pad": "1",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -3.81+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "1",+   "name": "A",+   "type": "input",+   "description": "Gated serial data input A. ANDed with input B to feed the first flip-flop; a low on either A or B inhibits new data entry and forces the first stage low on the next CLK rising edge.",+   "is_pin1": true,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "2",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -2.54+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "2",+   "name": "B",+   "type": "input",+   "description": "Gated serial data input B. ANDed with input A; must be high to permit A to control the first flip-flop.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "3",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -1.27+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "3",+   "name": "QA",+   "type": "output",+   "description": "Shift register stage 1 parallel output. Updated on the rising edge of CLK.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "4",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    0.0+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "4",+   "name": "QB",+   "type": "output",+   "description": "Shift register stage 2 parallel output.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "5",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    1.27+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "5",+   "name": "QC",+   "type": "output",+   "description": "Shift register stage 3 parallel output.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "6",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    2.54+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "6",+   "name": "QD",+   "type": "output",+   "description": "Shift register stage 4 parallel output.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "7",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    3.81+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "7",+   "name": "GND",+   "type": "power_in",+   "description": "Ground reference. 0 V return for VDD.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "8",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    3.81+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "8",+   "name": "CLOCK",+   "type": "input",+   "description": "Shift clock input. Data at A/B is captured on the low-to-high transition of CLK; fmax up to ~25 MHz at VCC=4.5 V (74HC).",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "9",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    2.54+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "9",+   "name": "CLEAR",+   "type": "input",+   "description": "Asynchronous active-low master clear. When low, all Q outputs are forced low independent of CLK.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "10",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    1.27+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "10",+   "name": "QE",+   "type": "output",+   "description": "Shift register stage 5 parallel output.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "11",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    0.0+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "11",+   "name": "QF",+   "type": "output",+   "description": "Shift register stage 6 parallel output.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "12",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -1.27+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "12",+   "name": "QG",+   "type": "output",+   "description": "Shift register stage 7 parallel output.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "13",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -2.54+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "13",+   "name": "QH",+   "type": "output",+   "description": "Shift register stage 8 (final) parallel output. Typically used as the serial-out to cascade additional 74HC164 devices.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "14",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -3.81+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "14",+   "name": "VDD",+   "type": "power_in",+   "description": "Positive supply voltage. Recommended 2 V to 6 V (nominal 5 V); absolute max 7 V.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  }+ ]+}\ No newline at end of file