74HC164

@@ -0,0 +1,50 @@+# 74HC164++**GR** · Shift Registers · SOP-14++74HC164 from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Serial data input A. AND-gated with input B to form the internal serial data (Qa = A AND B) that is clocked into the first stage on the rising edge of CLOCK. |+| 2 | B | input | Serial data input B. AND-gated with input A; tie high if only A is used as the serial input, or use as an active-high serial enable. |+| 3 | Qa | output | Parallel data output, first shift register stage (Q0). Follows the serial input after one clock rising edge. |+| 4 | Qb | output | Parallel data output, second shift register stage. |+| 5 | Qc | output | Parallel data output, third shift register stage. |+| 6 | Qd | output | Parallel data output, fourth shift register stage. |+| 7 | GND | power_in | Ground / 0 V reference for the device. |+| 8 | CLEAR | input | Asynchronous active-low master reset. Driving CLEAR low forces all Qa-Qh outputs to logic 0 regardless of CLOCK. Tie high for normal shifting. |+| 9 | CLOCK | input | Shift clock input. Rising edge shifts data one position to the right (Qa ← A·B, Qb ← Qa, … Qh ← Qg). |+| 10 | Qe | output | Parallel data output, fifth shift register stage. |+| 11 | Qf | output | Parallel data output, sixth shift register stage. |+| 12 | Qg | output | Parallel data output, seventh shift register stage. |+| 13 | Qh | output | Parallel data output, eighth (last) shift register stage. Use as the serial-out signal when cascading multiple 74HC164 devices. |+| 14 | VCC | power_in | Positive supply, 2.0 V to 6.0 V (5 V typical). Absolute maximum 6.5 V. Bypass locally to GND with a 100 nF ceramic capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GR |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `74HC164`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GR datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602886336932704256) (5 pp, sha256 `c1b9e169b9032c0d`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74hc164-datasheet.pdf)

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