component
74HC08D
Public Made by Adomby adom
Nexperia Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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Publish 0.2.1
4 files changed
+609−8
74hc08d-hero.glbadded⋯ 1 unchanged line ⋯
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package.json+207−4@@ -1,6 +1,6 @@ { "slug": "74hc08d",- "version": "0.2.0",+ "version": "0.2.1", "type": "component", "description": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [@@ -20,11 +20,214 @@ "74hc08d.kicad_mod", "74hc08d.glb", "74hc08d.step",+ "74hc08d-etched.step", "74hc08d.lbr", "docs/hero.png", "docs/74hc08d-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html",- "pads.json"- ]-}+ "pads.json",+ "74hc08d-hero.glb",+ "74hc08d-hero.overlay.json"+ ],+ "component": {+ "mpn": "74HC08D",+ "manufacturer": "Nexperia",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Gates",+ "datasheet": "https://assets.nexperia.com/documents/data-sheet/74HC08D.pdf",+ "parts": {+ "symbol": "74hc08d.kicad_sym",+ "footprint": "74hc08d.kicad_mod",+ "model_3d": "74hc08d-hero.glb",+ "model_3d_plain": "74hc08d.glb",+ "model_3d_step": "74hc08d-etched.step",+ "model_3d_step_plain": "74hc08d.step",+ "lbr": "74hc08d.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Data input A of gate 1 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "2",+ "name": "1B",+ "type": "input",+ "description": "Data input B of gate 1 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "3",+ "name": "1Y",+ "type": "output",+ "description": "Data output Y of gate 1. Push-pull CMOS output; 1Y = 1A AND 1B."+ },+ {+ "number": "4",+ "name": "2A",+ "type": "input",+ "description": "Data input A of gate 2 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "5",+ "name": "2B",+ "type": "input",+ "description": "Data input B of gate 2 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "6",+ "name": "2Y",+ "type": "output",+ "description": "Data output Y of gate 2. Push-pull CMOS output; 2Y = 2A AND 2B."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). All voltages are referenced to GND."+ },+ {+ "number": "8",+ "name": "3Y",+ "type": "output",+ "description": "Data output Y of gate 3. Push-pull CMOS output; 3Y = 3A AND 3B."+ },+ {+ "number": "9",+ "name": "3A",+ "type": "input",+ "description": "Data input A of gate 3 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "10",+ "name": "3B",+ "type": "input",+ "description": "Data input B of gate 3 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "11",+ "name": "4Y",+ "type": "output",+ "description": "Data output Y of gate 4. Push-pull CMOS output; 4Y = 4A AND 4B."+ },+ {+ "number": "12",+ "name": "4A",+ "type": "input",+ "description": "Data input A of gate 4 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "13",+ "name": "4B",+ "type": "input",+ "description": "Data input B of gate 4 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND."+ },+ {+ "number": "14",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage. Recommended operating range 2.0 V to 6.0 V (74HC08); absolute maximum -0.5 V to +7 V. Decouple to GND with a local 0.1 uF ceramic capacitor."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://assets.nexperia.com/documents/data-sheet/74HC08D.pdf",+ "pages": 14,+ "sha256": "6ef09938e8814089",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "pin1": {+ "pad": "1",+ "at": [+ -2.475,+ -3.81+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",+ "mark": "drawn"+ },+ "logic": {+ "family_id": "74HC08",+ "logic_family": "74HC",+ "function_code": "08",+ "function_class": "Gate",+ "function_name": "Quad 2-Input AND Gate",+ "manufacturer": null,+ "is_specialty": false+ },+ "models_3d": [+ {+ "file": "74hc08d.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 8.7,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "74hc08d-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 8.7,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a916e9ba56f6a7e12d2825cf33062d9e6c14bc5501c932c178eae97d00e83a2a",+ "checked": "2026-10-21",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "title": "74HC08D",+ "brief": "Nexperia Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",+ "metadata": {+ "specs": {+ "Manufacturer": "Nexperia",+ "Package": "SOIC-14",+ "Category": "Logic",+ "Pins": "14"+ }+ },+ "discovery_triggers": [+ "74hc08d"+ ],+ "discovery_pitch": "74HC08D (Nexperia) component page with datasheet-verified CAD.",+ "visibility": "public"+}
page.json+10−4@@ -4,7 +4,7 @@ "slug": "74hc08d", "title": "74HC08D", "brief": "Nexperia Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",- "version": "0.2.0",+ "version": "0.2.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -235,7 +235,13 @@ "docs/hero.png", "docs/74hc08d-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json",+ "74hc08d-hero.glb",+ "74hc08d-hero.overlay.json" ],- "updated_at": "2026-09-24T14:50:10.838Z"-}+ "updated_at": "2026-09-24T14:50:10.838Z",+ "description": "Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "visibility": "public",+ "org": "adom"+}