component
74AHCT244PW-Q100
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+202−8@@ -1,13 +1,212 @@ {+ "schema_version": 1,+ "type": "component", "slug": "74ahct244pw-q100",+ "title": "74AHCT244PW-Q100",+ "brief": "Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "74ahct244pw-q100" ],+ "component": {+ "mpn": "74AHCT244PW-Q100",+ "manufacturer": "Nexperia",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Buffers, Drivers, Receivers, Transceivers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908365464002560",+ "parts": {+ "symbol": "74ahct244pw-q100.kicad_sym",+ "footprint": "74ahct244pw-q100.kicad_mod",+ "model_3d": "74ahct244pw-q100.glb",+ "model_3d_step": "74ahct244pw-q100.step",+ "lbr": "74ahct244pw-q100.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1OE",+ "type": "input",+ "description": "Output enable input for bank 1 (1Y0-1Y3); active LOW. Driving 1OE HIGH forces the bank-1 outputs into the high-impedance (3-state) OFF-state; driving LOW enables the buffers so 1Yn tracks 1An. Schmitt-trigger, TTL-level input (VIH \u2265 2.0 V, VIL \u2264 0.8 V at VCC = 4.5-5.5 V), overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "2",+ "name": "1A0",+ "type": "input",+ "description": "Bank-1 data input, channel 0. Drives the 1Y0 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "3",+ "name": "2Y0",+ "type": "tri_state",+ "description": "Bank-2 buffered data output, channel 0. Follows 2A0 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V (VOH \u2265 3.94 V, VOL \u2264 0.36 V typical)."+ },+ {+ "number": "4",+ "name": "1A1",+ "type": "input",+ "description": "Bank-1 data input, channel 1. Drives the 1Y1 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "5",+ "name": "2Y1",+ "type": "tri_state",+ "description": "Bank-2 buffered data output, channel 1. Follows 2A1 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "6",+ "name": "1A2",+ "type": "input",+ "description": "Bank-1 data input, channel 2. Drives the 1Y2 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "7",+ "name": "2Y2",+ "type": "tri_state",+ "description": "Bank-2 buffered data output, channel 2. Follows 2A2 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "8",+ "name": "1A3",+ "type": "input",+ "description": "Bank-1 data input, channel 3. Drives the 1Y3 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "9",+ "name": "2Y3",+ "type": "tri_state",+ "description": "Bank-2 buffered data output, channel 3. Follows 2A3 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). All input/output voltages referenced to this pin."+ },+ {+ "number": "11",+ "name": "2A3",+ "type": "input",+ "description": "Bank-2 data input, channel 3. Drives the 2Y3 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "12",+ "name": "1Y3",+ "type": "tri_state",+ "description": "Bank-1 buffered data output, channel 3. Follows 1A3 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "13",+ "name": "2A2",+ "type": "input",+ "description": "Bank-2 data input, channel 2. Drives the 2Y2 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "14",+ "name": "1Y2",+ "type": "tri_state",+ "description": "Bank-1 buffered data output, channel 2. Follows 1A2 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "15",+ "name": "2A1",+ "type": "input",+ "description": "Bank-2 data input, channel 1. Drives the 2Y1 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "16",+ "name": "1Y1",+ "type": "tri_state",+ "description": "Bank-1 buffered data output, channel 1. Follows 1A1 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "17",+ "name": "2A0",+ "type": "input",+ "description": "Bank-2 data input, channel 0. Drives the 2Y0 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "18",+ "name": "1Y0",+ "type": "tri_state",+ "description": "Bank-1 buffered data output, channel 0. Follows 1A0 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength \u00b18 mA at VCC = 4.5 V."+ },+ {+ "number": "19",+ "name": "2OE",+ "type": "input",+ "description": "Output enable input for bank 2 (2Y0-2Y3); active LOW. Driving 2OE HIGH forces the bank-2 outputs into the high-impedance (3-state) OFF-state; driving LOW enables the buffers so 2Yn tracks 2An. Schmitt-trigger, TTL-level input, overvoltage-tolerant to 5.5 V."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage. Recommended operating range 4.5 V to 5.5 V for the 74AHCT variant (TTL-compatible input thresholds). Bypass locally with a 100 nF ceramic capacitor to GND."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908365464002560",+ "pages": 16,+ "sha256": "3851534f427a8b32",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Nexperia",+ "Package": "TSSOP-20",+ "Category": "Logic",+ "Pins": "20"+ }+ },+ "variants": [+ {+ "mpn": "74AHCT244PW-Q100",+ "kind": "packaging"+ },+ {+ "mpn": "74AHCT244PW-Q100D-Q100",+ "kind": "packaging"+ },+ {+ "mpn": "74AHCT244PW-Q100BQ-Q100",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "74ahct244pw-q100"+ ],+ "discovery_pitch": "74AHCT244PW-Q100 (Nexperia) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +224,5 @@ "docs/74ahct244pw-q100-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }