74AHCT244PW-Q100

@@ -0,0 +1,63 @@+# 74AHCT244PW-Q100++**Nexperia** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20++74AHCT244PW-Q100 from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Output enable input for bank 1 (1Y0-1Y3); active LOW. Driving 1OE HIGH forces the bank-1 outputs into the high-impedance (3-state) OFF-state; driving LOW enables the buffers so 1Yn tracks 1An. Schmitt-trigger, TTL-level input (VIH ≥ 2.0 V, VIL ≤ 0.8 V at VCC = 4.5-5.5 V), overvoltage-tolerant to 5.5 V. |+| 2 | 1A0 | input | Bank-1 data input, channel 0. Drives the 1Y0 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 3 | 2Y0 | tri_state | Bank-2 buffered data output, channel 0. Follows 2A0 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V (VOH ≥ 3.94 V, VOL ≤ 0.36 V typical). |+| 4 | 1A1 | input | Bank-1 data input, channel 1. Drives the 1Y1 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 5 | 2Y1 | tri_state | Bank-2 buffered data output, channel 1. Follows 2A1 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 6 | 1A2 | input | Bank-1 data input, channel 2. Drives the 1Y2 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 7 | 2Y2 | tri_state | Bank-2 buffered data output, channel 2. Follows 2A2 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 8 | 1A3 | input | Bank-1 data input, channel 3. Drives the 1Y3 buffer output when 1OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 9 | 2Y3 | tri_state | Bank-2 buffered data output, channel 3. Follows 2A3 when 2OE is LOW; high-impedance OFF-state when 2OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 10 | GND | power_in | Ground reference (0 V). All input/output voltages referenced to this pin. |+| 11 | 2A3 | input | Bank-2 data input, channel 3. Drives the 2Y3 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 12 | 1Y3 | tri_state | Bank-1 buffered data output, channel 3. Follows 1A3 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 13 | 2A2 | input | Bank-2 data input, channel 2. Drives the 2Y2 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 14 | 1Y2 | tri_state | Bank-1 buffered data output, channel 2. Follows 1A2 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 15 | 2A1 | input | Bank-2 data input, channel 1. Drives the 2Y1 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 16 | 1Y1 | tri_state | Bank-1 buffered data output, channel 1. Follows 1A1 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 17 | 2A0 | input | Bank-2 data input, channel 0. Drives the 2Y0 buffer output when 2OE is LOW. TTL-level, Schmitt-trigger, overvoltage-tolerant to 5.5 V. |+| 18 | 1Y0 | tri_state | Bank-1 buffered data output, channel 0. Follows 1A0 when 1OE is LOW; high-impedance OFF-state when 1OE is HIGH. Drive strength ±8 mA at VCC = 4.5 V. |+| 19 | 2OE | input | Output enable input for bank 2 (2Y0-2Y3); active LOW. Driving 2OE HIGH forces the bank-2 outputs into the high-impedance (3-state) OFF-state; driving LOW enables the buffers so 2Yn tracks 2An. Schmitt-trigger, TTL-level input, overvoltage-tolerant to 5.5 V. |+| 20 | VCC | power_in | Positive supply voltage. Recommended operating range 4.5 V to 5.5 V for the 74AHCT variant (TTL-compatible input thresholds). Bypass locally with a 100 nF ceramic capacitor to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## Ordering variants++Same part, different packaging or reel option.++- `74AHCT244PW-Q100`+- `74AHCT244PW-Q100D-Q100`+- `74AHCT244PW-Q100BQ-Q100`++## CAD (KiCad official)++- Symbol: `74AHCT244PW-Q100`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908365464002560) (16 pp, sha256 `3851534f427a8b32`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74ahct244pw-q100-datasheet.pdf)

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