component
74AHC595PW
Public Made by Adomby adom
Nexperia Shifting Register, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+178−8@@ -1,13 +1,188 @@ {+ "schema_version": 1,+ "type": "component", "slug": "74ahc595pw",+ "title": "74AHC595PW",+ "brief": "Nexperia Shifting Register, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Nexperia Shifting Register, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "74ahc595pw" ],+ "component": {+ "mpn": "74AHC595PW",+ "manufacturer": "Nexperia",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://assets.nexperia.com/documents/data-sheet/74AHC595PW.pdf",+ "parts": {+ "symbol": "74ahc595pw.kicad_sym",+ "footprint": "74ahc595pw.kicad_mod",+ "model_3d": "74ahc595pw.glb",+ "model_3d_step": "74ahc595pw.step",+ "lbr": "74ahc595pw.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "Q1",+ "type": "tri_state",+ "description": "Parallel data output bit 1. 3-state output; high-impedance when OE is HIGH. Drives \u00b18 mA at VCC = 4.5 V (VOH \u2265 3.94 V, VOL \u2264 0.36 V typical)."+ },+ {+ "number": "2",+ "name": "Q2",+ "type": "tri_state",+ "description": "Parallel data output bit 2. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "3",+ "name": "Q3",+ "type": "tri_state",+ "description": "Parallel data output bit 3. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "4",+ "name": "Q4",+ "type": "tri_state",+ "description": "Parallel data output bit 4. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "5",+ "name": "Q5",+ "type": "tri_state",+ "description": "Parallel data output bit 5. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "6",+ "name": "Q6",+ "type": "tri_state",+ "description": "Parallel data output bit 6. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "7",+ "name": "Q7",+ "type": "tri_state",+ "description": "Parallel data output bit 7. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). Max IGND = -75 mA."+ },+ {+ "number": "9",+ "name": "Q7S",+ "type": "output",+ "description": "Serial data output from the last shift register stage (Q7 of the shift register, not the storage register). Used to cascade multiple 595s. Not 3-stated by OE."+ },+ {+ "number": "10",+ "name": "MR",+ "type": "input",+ "description": "Master reset, active LOW. A LOW asynchronously clears the shift register only (storage register/parallel outputs unaffected until STCP is clocked). Schmitt-trigger input, overvoltage tolerant to 5.5 V."+ },+ {+ "number": "11",+ "name": "SHCP",+ "type": "input",+ "description": "Shift register clock input. Data on DS is shifted on the LOW-to-HIGH transition. Max frequency 130 MHz (VCC 4.5-5.5 V). Schmitt-trigger input."+ },+ {+ "number": "12",+ "name": "STCP",+ "type": "input",+ "description": "Storage register clock input. A LOW-to-HIGH transition transfers the shift register contents to the 8-bit storage register and to the parallel outputs. Schmitt-trigger input."+ },+ {+ "number": "13",+ "name": "OE",+ "type": "input",+ "description": "Output enable, active LOW. A HIGH forces Q0-Q7 into the high-impedance OFF-state; does not affect the shift or storage register contents. Schmitt-trigger input."+ },+ {+ "number": "14",+ "name": "DS",+ "type": "input",+ "description": "Serial data input to the shift register. Sampled on the LOW-to-HIGH edge of SHCP. Schmitt-trigger input, overvoltage tolerant to 5.5 V."+ },+ {+ "number": "15",+ "name": "Q0",+ "type": "tri_state",+ "description": "Parallel data output bit 0. 3-state output; high-impedance when OE is HIGH."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage. 2.0 V to 5.5 V (74AHC595); 4.5 V to 5.5 V (74AHCT595). Absolute max 7.0 V. Recommend local 0.1 \u00b5F decoupling to GND."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://assets.nexperia.com/documents/data-sheet/74AHC595PW.pdf",+ "pages": 19,+ "sha256": "67d6cf86d0a75a0a",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Nexperia",+ "Package": "TSSOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "74AHC595PW",+ "kind": "packaging"+ },+ {+ "mpn": "74AHC595PWD",+ "kind": "packaging"+ },+ {+ "mpn": "74AHC595PWBQ",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "74ahc595pw"+ ],+ "discovery_pitch": "74AHC595PW (Nexperia) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +200,5 @@ "docs/74ahc595pw-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }