component
2SD2143TL
Public Made by Adomby adom
ROHM Semicon Darlington Transistors, TO-252-2(DPAK). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+39@@ -0,0 +1,39 @@+# 2SD2143TL++**ROHM Semicon** · Darlington Transistors · TO-252-2(DPAK)++2SD2143TL from ROHM Semicon, in a TO-252-2(DPAK). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | B | input | NPN base; driven through built-in series resistor R1=3.5 kΩ and shunt resistor R2=300 Ω from base to emitter; BVCEO 60 V (50 V min, 70 V max). |+| 2 | C | passive | NPN collector (also exposed thermal tab); built-in zener diode to base and damper diode; VCEO 60±10 V, IC 2 A continuous (3 A pulse), PD 10 W at Tc=25°C, VCE(sat) 1.5 V max at IC=1 A. |+| 3 | E | passive | NPN emitter; VEBO 6 V max, IEBO 3 mA max at VEB=5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | ROHM Semicon |+| Package | TO-252-2(DPAK) |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `2SD2143TL`+- Footprint: `Package_TO_SOT_SMD:TO-252-2`+- 3D model: TO-252-2(DPAK) (KiCad packages3D, STEP)+- 3D model files: `2sd2143tl-etched.step` / `2sd2143tl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `2sd2143tl.step` / `2sd2143tl.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [ROHM Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203555191930880) (9 pp, sha256 `c6d44488633ec55f`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-4-6` (text+vision), consensus `claude-opus-4-7` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/2sd2143tl-datasheet.pdf)
page.jsonadded+113@@ -0,0 +1,113 @@+{+ "slug": "2sd2143tl",+ "version": "0.1.0",+ "type": "component",+ "description": "ROHM Semicon Darlington Transistors, TO-252-2(DPAK). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "transistors-thyristors",+ "2sd2143tl",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "2sd2143tl.kicad_sym",+ "2sd2143tl.kicad_mod",+ "2sd2143tl.glb",+ "2sd2143tl.step",+ "2sd2143tl.lbr",+ "docs/hero.png",+ "docs/2sd2143tl-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "2SD2143TL",+ "manufacturer": "ROHM Semicon",+ "package": "TO-252-2(DPAK)",+ "pin_count": 3,+ "category": "Transistors/Thyristors",+ "subcategory": "Darlington Transistors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203555191930880",+ "parts": {+ "symbol": "2sd2143tl.kicad_sym",+ "footprint": "2sd2143tl.kicad_mod",+ "model_3d": "2sd2143tl-etched.glb",+ "model_3d_plain": "2sd2143tl.glb",+ "model_3d_step": "2sd2143tl-etched.step",+ "model_3d_step_plain": "2sd2143tl.step",+ "lbr": "2sd2143tl.lbr"+ },+ "distributor_links": {+ "lcsc": "C94816"+ },+ "pins": [+ {+ "number": "1",+ "name": "B",+ "type": "input",+ "description": "NPN base; driven through built-in series resistor R1=3.5 kΩ and shunt resistor R2=300 Ω from base to emitter; BVCEO 60 V (50 V min, 70 V max)."+ },+ {+ "number": "2",+ "name": "C",+ "type": "passive",+ "description": "NPN collector (also exposed thermal tab); built-in zener diode to base and damper diode; VCEO 60±10 V, IC 2 A continuous (3 A pulse), PD 10 W at Tc=25°C, VCE(sat) 1.5 V max at IC=1 A."+ },+ {+ "number": "3",+ "name": "E",+ "type": "passive",+ "description": "NPN emitter; VEBO 6 V max, IEBO 3 mA max at VEB=5 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-sonnet-4-6",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-4-7",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 9,+ "cost_usd": 0.286,+ "at": "2026-09-22T04:50:22"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586203555191930880",+ "pages": 9,+ "sha256": "c6d44488633ec55f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 3,+ "described": 3,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}