24LC512T-I/SN

@@ -0,0 +1,54 @@+# 24LC512T-I++**Microchip** · EEPROM · SOIC-8++24LC512T-I from Microchip, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A0 | input | User-configurable chip-address input bit 0. Compared with the corresponding bit in the I2C slave address (control byte); the device responds when all three A[2:0] bits match. Must be tied to VSS or VCC - do not leave floating. Allows up to 8 devices to share a bus (4 Mbit address space). |+| 2 | A1 | input | User-configurable chip-address input bit 1. Compared with the corresponding bit in the I2C slave address; must be tied high (VCC) or low (VSS). Combined with A0/A2 selects one of up to 8 devices on the bus. |+| 3 | A2 | input | User-configurable chip-address input bit 2. Compared with the corresponding bit in the I2C slave address; must be tied to VCC or VSS. Together with A0/A1 forms the 3-bit device select field. |+| 4 | VSS | power_in | Ground reference for all logic and the EEPROM array. Connect to system 0 V. |+| 5 | SDA | bidirectional | Bidirectional I2C serial data line. Open-drain output - requires an external pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz / 1 MHz). Data on SDA may change only while SCL is low; transitions while SCL is high signal Start/Stop conditions. |+| 6 | SCL | input | I2C serial clock input. Synchronizes all data transfers to/from the device; supplied by the bus master. Schmitt-trigger input with noise-spike suppression; up to 400 kHz on 24LC512. |+| 7 | WP | input | Write-Protect input. Tie to VSS to enable write operations; tie to VCC to inhibit writes to the entire array (reads unaffected). Must not be left floating. |+| 8 | VCC | power_in | Positive supply. 24LC512 operating range +2.5 V to +5.5 V. Typical active current 400 µA (read @ 400 kHz), write current 5 mA, standby current 100 nA typ / 1 µA max at 5.5 V. Decouple with 0.1 µF close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Microchip |+| Package | SOIC-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `24LC512T-IP`+- `24LC512T-ISN`+- `24LC512T-ISM`+- `24LC512T-IST`+- `24LC512T-ISL`+- `24LC512T-IMF`+- `24LC512T-IMNY`+- `24LC512T-ICS`++## CAD (KiCad official)++- Symbol: `24LC512T-I`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Microchip datasheet](docs/24lc512t-i-datasheet.pdf) (36 pp, sha256 `0d28e107e3c4e44e`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/24lc512t-i-datasheet.pdf)

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