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24lc512t-i: factory component page (tier=mfr)

Ray ·1a166ebab5 · ·parent 57042fb
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "24lc512t-i",+  "title": "24LC512T-I",+  "brief": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "24lc512t-i"   ],+  "component": {+    "mpn": "24LC512T-I",+    "manufacturer": "Microchip",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "EEPROM",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/a44192bca46f726c002b5a9c309b7283.pdf",+    "parts": {+      "symbol": "24lc512t-i.kicad_sym",+      "footprint": "24lc512t-i.kicad_mod",+      "model_3d": "24lc512t-i.glb",+      "model_3d_step": "24lc512t-i.step",+      "lbr": "24lc512t-i.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "User-configurable chip-address input bit 0. Compared with the corresponding bit in the I2C slave address (control byte); the device responds when all three A[2:0] bits match. Must be tied to VSS or VCC - do not leave floating. Allows up to 8 devices to share a bus (4 Mbit address space)."+      },+      {+        "number": "2",+        "name": "A1",+        "type": "input",+        "description": "User-configurable chip-address input bit 1. Compared with the corresponding bit in the I2C slave address; must be tied high (VCC) or low (VSS). Combined with A0/A2 selects one of up to 8 devices on the bus."+      },+      {+        "number": "3",+        "name": "A2",+        "type": "input",+        "description": "User-configurable chip-address input bit 2. Compared with the corresponding bit in the I2C slave address; must be tied to VCC or VSS. Together with A0/A1 forms the 3-bit device select field."+      },+      {+        "number": "4",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference for all logic and the EEPROM array. Connect to system 0 V."+      },+      {+        "number": "5",+        "name": "SDA",+        "type": "bidirectional",+        "description": "Bidirectional I2C serial data line. Open-drain output - requires an external pull-up resistor to VCC (typical 10 k\u03a9 for 100 kHz, 2 k\u03a9 for 400 kHz / 1 MHz). Data on SDA may change only while SCL is low; transitions while SCL is high signal Start/Stop conditions."+      },+      {+        "number": "6",+        "name": "SCL",+        "type": "input",+        "description": "I2C serial clock input. Synchronizes all data transfers to/from the device; supplied by the bus master. Schmitt-trigger input with noise-spike suppression; up to 400 kHz on 24LC512."+      },+      {+        "number": "7",+        "name": "WP",+        "type": "input",+        "description": "Write-Protect input. Tie to VSS to enable write operations; tie to VCC to inhibit writes to the entire array (reads unaffected). Must not be left floating."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply. 24LC512 operating range +2.5 V to +5.5 V. Typical active current 400 \u00b5A (read @ 400 kHz), write current 5 mA, standby current 100 nA typ / 1 \u00b5A max at 5.5 V. Decouple with 0.1 \u00b5F close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/a44192bca46f726c002b5a9c309b7283.pdf",+        "pages": 36,+        "sha256": "0d28e107e3c4e44e",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Microchip",+      "Package": "SOIC-8",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "24lc512t-i"+  ],+  "discovery_pitch": "24LC512T-I (Microchip) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/24lc512t-i-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file